1. Technical Field
The present document relates relates to linear regulators or linear voltage regulators configured to provide a constant output voltage. In particular, the present document relates to driver circuits for low-dropout (LDO) regulators.
2. Background
Low-dropout (LDO) regulators are linear voltage regulators which can operate with small input-output differential voltages. A typical LDO regulator 100 is illustrated in FIG. 1a. The LDO regulator 100 comprises an output amplification stage 103, e.g. comprising a field-effect transistor (FET), at the output and a differential amplification stage or differential amplifier 101 (also referred to as error amplifier) at the input. A first input (fb) 107 of the differential amplifier 101 receives a fraction of the output voltage Vout determined by the voltage divider 104 comprising resistors R0 and R1. The second input (ref) to the differential amplifier 101 is a stable voltage reference Vref 108 (also referred to as the bandgap reference). If the output voltage Vout changes relative to the reference voltage Vref, the drive voltage to the output amplification stage, e.g. the power FET, changes by a feedback mechanism called a main feedback loop to maintain a constant output voltage Vout.
The LDO regulator 100 of FIG. 1a further comprises an additional intermediate amplification stage 102 configured to amplify the output voltage of the differential amplification stage 101. As such, an intermediate amplification stage 102 may be used to provide an additional gain within the amplification path. Furthermore, the intermediate amplification stage 102 may provide a phase inversion, thereby implementing a negative feedback mechanism.
In addition, the LDO regulator 100 may comprise an output capacitance Cout (also referred to as output capacitor or stabilization capacitor or bypass capacitor) 105 parallel to the load 106. The output capacitor 105 may be used to stabilize the output voltage Tout subject to a change of the load 106, in particular subject to a change of the load current Iload. It should be noted that typically the output current Iout at the output of the output amplification stage 103 corresponds to the load current Iload through the load 106 of the regulator 100 (apart from typically minor currents through the voltage divider 104 and the AC current through the output capacitor 105). Consequently, the terms output current Iout and load current Iload are used synonymously, if not specified otherwise.
As such, FIG. 1a shows an example block diagram for an LDO regulator 100 with three amplification stages A1, A2, A3 (reference numerals 101, 102, 103, respectively). Where A2 receives signal “out_s1” from A1 and where A3 receives signal “out_s2” from A2. FIG. 1b illustrates another block diagram of a LDO regulator 120, wherein the output amplification stage A3 (reference numeral 103) is depicted in more detail. In particular, the pass transistor 201 (also referred to as the “Pass device”) and the driver stage (DS) 110 (also referred to as the driver circuit) of the output amplification stage 103 are shown. Pass transistor 201 receives signal “gat_pd” from driver stage 110. Pass transistor 201 in turn is coupled to a supply voltage Vin (Vdd). Typical parameters of an LDO regulator are a supply voltage of 3.6V, an output voltage of 3.3V, and an output current or load current ranging from 1 mA to 100 or 200 mA. Other configurations are possible.